One path into silicon — in order.
New to chips? You never have to guess what to learn next. Start at the top and climb: from the big picture to the hands-on craft. One course is available now, with the next ones landing as I build them.
The Silicon World
How semiconductors really work — from a single transistor to the geopolitics of Taiwan. The map you were never given, told like a story.
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Vim for Silicon Engineers
Boost your productivity to superhuman levels. Master the editor you'll live inside every day — the pragmatic way, built for RTL. Real speed, real muscle memory.
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Static Timing Analysis
Setup and hold that decide if silicon actually works at speed — SDC constraints, on-chip variation, and a hands-on lab fixing real timing violations on a Sky130 design. The check every chip clears before sign-off.
Silicon Test & DFT Methodologies
Make silicon testable and trustworthy: fault models and ATPG, scan and JTAG, test compression, at-speed, MBIST and low-power DFT — the senior test discipline, tool in hand. The advanced specialization.
Managing Programs with AI Agents
Run a real program with a fleet of orchestrated AI agents — charter, risks, dependencies, execution and reporting. You build the system on your own program, not slideware. For TPMs, engineering managers and founders.
Where this is going
The whole road into silicon — built one deliberate course at a time. Track any of these to hear the moment it opens.
Fundamentals & Design
- VerilogThe base hardware languagePlanned
- RTL DesignThinking in hardware: FSMs, pipelines, CDCPlanned
Verification
- SystemVerilog for VerificationAssertions, constrained-random, coveragePlanned
- UVMThe industry-standard methodologyPlanned
- pyUVMUVM in PythonPlanned
Open-source implementation
- Open-Source SimulationVerilator & IcarusPlanned
- Practical SynthesisFrom RTL to gates with YosysPlanned
- OpenROADRTL-to-GDS, end to endPlanned
Deep test
- Fault Models & ATPGThe DFT deep divePlanned
Systems
- RISC-VFrom the ISA to a working corePlanned
Numerics & scripting
- Octave for Digital DesignersGolden models & DSPPlanned
- Python for Hardware EngineersAutomate the whole flowPlanned